1. Field of the Invention
This invention is related to a comparator, and is more particularly related to a high-speed rail-to-rail comparator.
2. Description of Related Art
Reference is made to FIG. 1A, which shows a circuit of a conventional analog comparator. The comparator 5 includes two p-type metal oxide semiconductor (PMOS) transistors and two n-type metal oxide semiconductor (NMOS) transistors. As shown in FIG. 1 A, a PMOS transistor 10 and a PMOS 20 are used for active loads. The comparator 5 is coupled to a reference signal Vref (Vss&lt;Vref&lt;Vcc) through a gate terminal of a NMOS transistor 30, an input signal Vin through a NMOS transistor 40 and an output signal Vout through a drain terminal of the NMOS transistor 40. The comparator 5 is also coupled to a fixed current source Is.
When the voltage level of the input signal Vin is larger than the Vref, the NMOS transistor 30 is closed and the NMOS transistor 40 is opened, and then the voltage level of the output signal Vout is very close to Vss. When the voltage level of the input signal Vin is smaller than Vref, the NMOS transistor 30 is opened and the NMOS transistor 40 is closed, and then the voltage level of the output signal Vout is also very close to Vcc.
The voltage level of the input signal Vin of the conventional comparator 5 is limited to a value between Vss and Vcc. If the voltage level of the input signal Vin is Vcc, the output signal Vout is very close to Vss; when the input signal Vin is rapidly changed to Vss, Vout is raised from a voltage level close to Vss and is raised to Vcc. By a similar manner, when the input signal Vin is rapidly changed from Vss to Vcc, Vout is decreased from a voltage level close to Vcc and is changed to Vss. A schematic diagram of a curve for Vin-Vout is shown in FIG. 1B.
The swing range of the input signal Vin in the conventional comparator 5 is rail-to-rail, which is a voltage from Vcc to Vss or from Vss to Vcc. The swing range of the output signal Vout is larger in the conventional comparator. Therefore, a longer time is necessary in response to output a comparison result, which is a drawback for the comparator when used in a high-speed circuit.
Reference is made to FIG. 2A, which shows a conventional comparator 55 manifesting a phenomenon of magnetic hysteresis. The comparator 55 includes four PMOS transistors and two NMOS transistors. The PMOS transistors 52 and 54 are used as a active load 50. The PMOS transistors 62 and 64 are used as another active load 60. The comparator 55 is coupled to a reference signal Vref (Vss&lt;Vref&lt;Vcc) through a gate terminal of a NMOS transistor 70, an input signal Vin through a NMOS transistor 80 and an output signal Vout through a drain terminal of the NMOS transistor 80. The comparator 55 is also coupled to a fixed current source Is.
In the circuit of the comparator 55, when the device parameter K.sub.54 of the PMOS transistor 54 (device parameter ##EQU1##
) is larger than the device parameter K.sub.52 of the PMOS transistor 52, and the device parameter K.sub.64 of the PMOS transistor 64 is larger than the device parameter K.sub.62 of the PMOS transistor 62, as well, the phenomenon of magnetic hysteresis occurs in the comparator.
Reference is made to FIG. 2B, which shows a schematic diagram of a curve for Vin-Vout in a comparator manifesting a phenomenon of magnetic hysteresis. The comparator has two reference voltages V.sup.+ ref and V.sup.- ref. When the voltage level of the input signal is larger than the reference voltages V.sup.+ ref, the voltage level of the output signal is decreased from about Vcc to about Vss. When the voltage level of the input signal is smaller than the reference voltages V.sup.- ref, the voltage level of the output signal is increased from about Vss to about Vcc. The swing range of the output signal of the comparator with the phenomenon of magnetic hysteresis is very large; therefore, a longer time is required to respond and to output an accurate result. This longer time is also a draw-back for the comparator when used in a high-speed circuit.